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Verdi_advance

'Verdi_advance'
Design Better Debug Faster Debug Workshop Dramatically enhance your debugging efficiency 2005 Based on Verdi54v7 Design Better Debug Faster Debug Workshop Agenda ? Trace Signal with Wrong Transition ? If signal’s value goes wrong after simulation ? Debug Memory ? Calculate memory content without dumping and trace its written time ? Trace Unknown Value ? Find out the root cause of a signal with unknown value automatically Design Better Debug Faster Debug Workshop Agenda ? Waveform Comparison ? Find the mismatch between 2 fsdb’s ? Automatically find cause if design is the same ? Isolate Circuits to Debug ? Focus on module interface signals ? Debug by partial schematics ? Locate problematic gates with simulation values to fan-in registers ? Debug Critical Paths ? Debug the STA report efficiently Design Better Debug Faster Debug Workshop Agenda ? Clock Domain Analysis ? View the clock tree and calculate skew ? Check out data path between two domains ? Import Design Faster ? Shorten the time to import huge design on GUI window ? Only import some sub-blocks ? Reduce FSDB Size ? Use new PLI tasks Design Better Debug FasterTrace Signal with Wrong Transition ? Common Problems ? Must open multiple source files and correlate signals in waveform to judge real driver ? Novas Solution ? Debug on Verdi’s “Temporal Flow Graph” by “Trace This Value” ? Use “Active Trace” with “Active Annotation” in codes and waveforms Design Better Debug FasterTrace Signal with Wrong Transition Active Trace(1/2) ? Purpose: ? Refer to simulation result to catch the real driver for specific signal at a given time ? Usage: ? Import design with FSDB ? Do Active Trace either by ? Select interested signal and set cursor to the wrong transition in waveform window ? Double click at this wrong transition ? Or select signal and do Active Trace with RMB (right mouse button) in source code window ? Verdi/Debussy will highlight the active driving statement in source code window Design Better Debug FasterTrace Signal with Wrong Transition Active Trace(2/2) 2.Double click on wrong transition 2.Double click on wrong transition 3. Verdi will highlight the real driving statement 3. Verdi will highlight the real driving statement 1.Select interested signal 1.Select interested signal Design Better Debug Faster Trace Signal with Wrong Transition Active Annotation(1/2) ? Purpose: ? Annotate simulation result in source code or schematic window to view signal value with design context ? Usage: ? Load simulation result(FSDB) ? nTrace??Source??Active Annotation ? nSchema??Schematic??Active Annotation ? Signal’s value will change with cursor time Design Better Debug Faster Trace Signal with Wrong Transition Active Annotation(2/2) Signal’s value will change with cursor time Signal’s value will change with cursor time cursor time cursor time Design Better Debug Faster Lab1-1 Use “Active Trace” to trace wrong value ? Verdi –f run.f –ssf rtl.fsdb ? MDT Description: clock : @(posedge clk) condition: cen
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Verdi_advance
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