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1、外文原文IntroductiontoSTC89C52GeneralDescriptionTheSTC89C52isalow-power,high-performanceCMOS8-bitmicrocomputerwith4KbytesofFlashProgrammableandErasableReadOnlyMemory(PEROM).ThedeviceismanufacturedusingAtmel’shighdensitynonvolatilememorytechnologyandiscompatiblewiththeindus
2、trystandardMCS-51™instruction-setandpinout.Theon-chipFlashallowstheprogrammemorytobereprogrammedin-systemorbyaconventionalnonvolatilememoryprogrammer.Bycombiningaversatile8-bitCPUwithFlashonamonolithicchip,theAtmelSTC89C52isapowerfulmicrocomputerwhichprovidesahighlyfle
3、xibleandcosteffectivesolutiontomanyembeddedcontrolapplications.STC89C52hasthefollowingfeatures:40-pin,4kBytesFlashchipprogrammemory,128bytesofrandomaccessdatamemory(RAM),32externalbi-directionalinput/output(I/O)ports,interruptprioritylevel25Interruptnestinglevelinterru
4、pts,two16-bitprogrammabletimercounters,twofullduplexserialport,watchdog(WDT)circuit,theon-chipclockoscillator.Inaddition,STC89C52designandconfigurationoftheoscillationfrequencycanbesetto0Hzandthroughthesoftwarepower-savingmode.Idlemode,CPUtosuspendwork,andRAMtimingcoun
5、ters,serialport,andinterruptsystemtocontinue,butfreezestheoscillatorpower-downmodesaveRAM,disablingallotherchipfunctionsuntilthenextinterruptorhardwarereset.Meanwhile,thechipalsohasPDIP,TQFPandPLCCpackagessuchasthree,toaccommodatedifferentproductsFeaturesOverviewTheSTC
6、89C52providesthefollowingstandardfeatures:4KbytesofFlash,128bytesofRAM,32I/Olines,two16-bittimer/counters,afivevectortwo-levelinterruptarchitecture,afullduplexserialport,on-chiposcillatorandclockcircuitry.Inaddition,theSTC89C52isdesignedwithstaticlogicforoperationdownt
7、ozerofrequencyandsupportstwosoftwareselectablepowersavingmodes.TheIdleModestopstheCPUwhileallowingtheRAM,timer/counters,serialportandinterruptsystemtocontinuefunctioning.ThePower-downModesavestheRAMcontentsbutfreezestheoscillatordisablingallotherchipfunctionsuntilthene
8、xthardwarereset.Features•CompatiblewithMCS-51™Products•4KBytesofIn-SystemReprogrammableFlashMemory–Endurance:1,000Wri