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1、LVDSSERDESTransmitter/Receiver(ALTLVDS_TXandALTLVDS_RX)Megafunctions2013.11.08UG-MF9504SubscribeFeedbackYoucanconfigurethefeaturesofthelow-voltagedifferentialsignalingserializerordeserializer(LVDSSERDES)megafunctions—ALTLVDS_TXandALTLVDS_RX,throughtheMegaWizard™Plu
2、g-InManager®intheQuartusIIsoftware.TheALTLVDS_TXandALTLVDS_RXmegafunctionsimplementtheLVDSSERDESinterfacestotransmitandreceivehigh-speeddifferentialdata.FeaturesThefollowingtableliststhefeaturesoftheALTLVDS_TXandALTLVDS_RXmegafunctions.Table1:ALTLVDS_TXandALTLVDS_R
3、XFeaturesFeaturesSupporteddevicesALTLVDS_TXandALTLVDS_RXParameterizabledatachannelwidthsAlldevicesstatedintheDeviceSupportsection.Parameterizableserializer/deserializer(SERDES)factorsAlldevicesstatedintheDeviceSupportsection.RegisteredinputandoutputportsAlldevicess
4、tatedintheDeviceSupportsection.Supportforexternalphase-lockedloops(PLL)AlldevicesstatedintheDeviceSupportsection.PLLssharingbetweentransmittersandreceiversAlldevicesstatedintheDeviceSupportsection.PLLcontrolsignalsAlldevicesstatedintheDeviceSupportsection.Choicetoi
5、mplementtheLVDSinterfaceindedicatedAlldevicesstatedintheDeviceSupportsection®®circuitryorlogiccellsexcludingArriaV,ArriaVGZ,Cycloneseries,and®StratixV.ALTLVDS_RXOnlyDynamicphasealignment(DPA)modesupportAlldevicesstatedintheDeviceSupportsectionexcludingCycloneseries
6、.DPAPLLcalibrationsupportAlldevicesstatedintheDeviceSupportsection®excludingArriaIIGX,Cycloneseries,HardCopyII,Stratix,StratixGX,StratixII,andStratixIIGX.Softclockdatarecovery(CDR)modesupportArriaIIGX,ArriaIIGZ,ArriaV,ArriaVGZ,HardCopyIII,HardCopyIV,StratixIII,Stra
7、tixIV,andStratixVdevices.©2013AlteraCorporation.Allrightsreserved.ALTERA,ARRIA,CYCLONE,HARDCOPY,MAX,MEGACORE,NIOS,QUARTUSandSTRATIXwordsandlogosaretrademarksofAlteraCorporationandregisteredintheU.S.PatentandTrademarkOfficeandinothercountries.Allotherwordsandlogosid
8、entifiedastrademarksorservicemarksarethepropertyoftheirrespectiveholdersasdescribedatwww.altera.com/common/legal.html.ISOAlterawarrantsperformanc
