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1、FunctionalVerificationofProgrammableEmbeddedArchitecturesATop-DownApproachFUNCTIONALVERIFICATIONOFPROGRAMMABLEEMBEDDEDARCHITECTURESATop-DownApproachPRABHATMISHRADepartmentofComputerandInformationScienceandEngineeringUniversityofFlorida,USANIKILD.DUTTCenterforEmbeddedComputerSystems
2、DonaldBrenSchoolofInformationandComputerSciencesUniversityofCalifornia,Irvine,USA4ySpringerPrabhatMishraNikilD.DuttUniversityofFloridaUniversityofCalifornia,IrvineUSAUSAFunctionalVerificationofProgrammableEmbeddedArchitecturesATop-DownApproachISBN0-387-26143-5e-ISBN0-387-26399-3Pri
3、ntedonacid-freepaper.ISBN978-0387-26143-0©2005SpringerScience+BusinessMedia,Inc.Allrightsreserved.Thisworkmaynotbetranslatedorcopiedinwholeorinpartwithoutthewrittenpermissionofthepublisher(SpringerScience+BusinessMedia,Inc.,233SpringStreet,NewYork,NY10013,USA),exceptforbriefexcerpt
4、sinconnectionwithreviewsorscholarlyanalysis.Useinconnectionwithanyformofinformationstorageandretrieval,electronicadaptation,computersoftware,orbysimilarordissimilarmethodologynowknownorhereafterdevelopedisforbidden.Theuseinthispublicationoftradenames,trademarks,servicemarksandsimil
5、arterms,eveniftheyarenotidentifiedassuch,isnottobetakenasanexpressionofopinionastowhetherornottheyaresubjecttoproprietaryrights.PrintedintheUnitedStatesofAmerica.987654321SPIN11430100springeronline.comToourfamilies.ContentsPrefacexvAcknowledgmentsxixIIntroductiontoFunctionalVerific
6、ation11Introduction31.1Motivation31.1.1GrowthofDesignComplexity31.1.2FunctionalVerification-AChallenge41.2TraditionalValidationFlow81.3Top-DownValidationMethodology101.4BookOrganization12IIArchitectureSpecification132ArchitectureSpecification152.1ArchitectureDescriptionLanguages162
7、.1.1BehavioralADLs182.1.2StructuralADLs192.1.3MixedADLs192.1.4PartialADLs202.2ADLsandOtherSpecificationLanguages202.3SpecificationusingEXPRESSIONADL212.3.1ProcessorSpecification242.3.2CoprocessorSpecification252.3.3MemorySubsystemSpecification272.4ChapterSummary28viiiCONTENTS3Valid
8、ationofSpecification293.1V
