高性能低功耗嵌入式内存管理单元设计分析

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1、浙江大学硕士学位论文AbstractWiththedevelopmentofcomplicatedembeddedapplications，memorymanagementhasbecomethefocusandthedifficultpartofHW-SWdesigninhigh-endembeddedprocessors．Virtualmemorytechniqueisaneffectivememorymanagementmethod，whichistransparenttosoftwarebasedonoperatingsystem．Thiscansimplify

2、thememorymanagementmodeandenhancetheportabilityofapplicationsoftware．Meanwhile，memorymanagementunit(MMU)，themajorconcemofpowerconsumptionandareacostofembeddedprocessors，isimplementedinhardwaretorealizevirtualmemorytechnique．InthisthesisweproposesomekeytechniquesofembeddedTLBforhighperfor

3、manceandlowpowerimplementationofembeddedMMU．Theoriginalcontributionsofthisthesisareasfollows：1．ATLBdesignmethodbasedoncacheresourcereusing．ThisthesisanalyzedthesimilaritybetweenTLBandCacheentryinstoragestructureandaccessingbehavior,andthenproposedanewTLBdesignmethodbasedonreusingcachehar

4、dwareresourceforlowerpowerconsumptionandsmallerareacostinembeddedprocessor．Thismethodsetupcacheaddressmappingtable，whichrecordedthelocationofTLBentryinCache，todecreaseTLBaccesseswithlessdynamicpowerconsumption．2．Aninnovationofmulti-processTLBentrysharingonecachelinewindow．Thismethodparti

5、tionscachelineintodifferentprocesswindowstopreventfrequencyreplacementofTLBentryduringprocessswitch．Dynamical浙江人学硕士学位论文AbstractTLBentryextensionbasedoncachearchitectureenlargedthemappingrangeofphysicaladdressforhigherTLBhitrateandprovidedasolutiontoTLBentryrestrictionintraditionalTLBdesi

6、gn．MoreoveLanentrylockingmethodofTLBwasalsoproposedtobalancetheresourcehazardinmaximumdegreebetweenTLBentryandinstruction／data．3．Two-levellow-powerTLBimplementationwithmultipleTLBpagesizessupported．Thismethodutilizedtwo-levelTLBarchitecturetosolvecacheaccesshazardbetweenTLBandinstruction

7、／data，withgreatdynamicpowersavedwhenaccessingin-cacheTLB．TwopagesizescouldbedynamicallysupportedbyextendingthefirstlevelTLBentryforhigherTLBhitrate．ComparedwithtraditionalTLBdesign，experimentsshowthattheproposedmethodreducesthepowerconsumptionandareacostofembeddedprocesso