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1、IEEEStandardforSystemVerilog—UnifiedHardwareDesign,Specification,andVerificationLanguageIEEEComputerSocietySponsoredbytheDesignAutomationStandardsCommitteeandtheIEEEStandardsAssociationCorporateAdvisoryGroupIEEE3ParkAvenueIEEEStd1800™-2005NewYork,NY10016-5997,US
2、A22November2005Authorizedlicenseduselimitedto:XIDIANUNIVERSITY.DownloadedonJuly31,2011at02:45:48UTCfromIEEEXplore.Restrictionsapply.Authorizedlicenseduselimitedto:XIDIANUNIVERSITY.DownloadedonJuly31,2011at02:45:48UTCfromIEEEXplore.Restrictionsapply.IEEEStd1800™-
3、2005IEEEStandardforSystemVerilog—UnifiedHardwareDesign,Specification,andVerificationLanguageSponsorDesignAutomationStandardsCommitteeoftheIEEEComputerSocietyandtheIEEEStandardsAssociationCorporateAdvisoryGroupApproved8November2005IEEE-SAStandardsBoardAbstract:Th
4、isstandardprovidesasetofextensionstotheIEEE1364™Verilog®hardwaredescriptionlanguage(HDL)toaidinthecreationandverificationofabstractarchitecturallevelmodels.Italsoincludesdesignspecificationmethods,embeddedassertionslanguage,testbenchlanguageincludingcoverageanda
5、nassertionsapplicationprogramminginterface(API),andadirectprogramminginterface(DPI).Thisstandardenablesaproductivityboostindesignandvalidationandcoversdesign,simulation,validation,andformalassertion-basedverificationflows.Keywords:assertions,designautomation,des
6、ignverification,hardwaredescriptionlanguage,HDL,PLI,programminglanguageinterface,SystemVerilog,Verilog,Verilogprogramminginterface,VPITheInstituteofElectricalandElectronicsEngineers,Inc.3ParkAvenue,NewYork,NY10016-5997,USACopyright©2005bytheInstituteofElectrical
7、andElectronicsEngineers,Inc.Allrightsreserved.Published22November2005.PrintedintheUnitedStatesofAmerica.IEEEisaregisteredtrademarkintheU.S.Patent&TrademarkOffice,ownedbytheInstituteofElectricalandElectronicsEngineers,Incorporated.VerilogisaregisteredtrademarkofC
8、adenceDesignSystems,Inc.CD-ROMISBN0-7381-4810-5SE95376PDF:ISBN0-7381-4811-3SS95376Nopartofthispublicationmaybereproducedinanyform,inanelectronicretrievalsystemorother
