用VHDL设计键盘输入显示方案.doc

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1、1、显示控制--ModuleName:DispCtrl-Behavioral--Description:GeneratestheimmagefortheVGADemo--------------------------------------------------------------------------------libraryIEEE;useIEEE.STD_LOGIC_1164.ALL;useIEEE.STD_LOGIC_ARITH.ALL;useIEEE.STD_LOGIC_UNSIGNED.ALL;entityDispCtrlisPort(clk25MHz

2、:instd_logic;Hcnt:instd_logic_vector(9downto0);--horizontalcounterVcnt:instd_logic_vector(9downto0);--vericalcounterromdatain:instd_logic_vector(7downto0);--vvvvvvvvvvvvvvvvvvvoutRed:outstd_logic_vector(2downto0);--finalcoloroutGreen:outstd_logic_vector(2downto0);--outputsoutBlue:outstd_lo

3、gic_vector(1downto0);adrVideoMem:outstd_logic_vector(3downto0));--addrintheLogoimmageendDispCtrl;architectureBehavioralofDispCtrlis--constantsforSynchromoduleconstantPAL:integer:=640;--Pixels/ActiveLine(pixels)constantLAF:integer:=480;--Lines/ActiveFrame(lines)--constantsforVGADemoconstant

4、HBorder:integer:=40;--Horizontalborder(pixels)constantVBorder:integer:=40;--Verticalborder(lines)constantHsize:integer:=7;--Horizontallogosize(pixels)标志的水平尺寸64constantVsize:integer:=11;--Verticallogosize(pixels)标志的垂直尺寸64signalHorigin:integer:=60;--Horizontallogoorigin(pixels)标志的水平原点signalV

5、origin:integer:=60;--Verticallogoorigin(pixels)标志的垂直原点signaladrVideoPixel:std_logic_vector(2downto0);signaladrVideoLine:std_logic_vector(3downto0);signalcntDyn:integerrange0to2**28-1;--dynamiceffectcountersignalintHcnt:integerrange0to800-1;--PLD-1-horizontalcounter---水平计数器signalintVcnt:int

6、egerrange0to521-1;--LFD-1-vericalcounter---垂直计数器begin--mappingthestd_logic_vectorportstointernalintegersintHcnt<=conv_integer(Hcnt);intVcnt<=conv_integer(Vcnt);adrVideoPixel<=conv_std_logic_vector(intHcnt-Horigin,4);adrVideoLine<=conv_std_logic_vector(intVcnt-Vorigin,4);adrVideoMem<=adrVid

7、eoLine;--counterforcolorbardynamicsdiynamic:process(clk25MHz)beginifclk25MHz'eventandclk25MHz='1'thencntDyn<=cntDyn+1;endif;endprocess;mixer:process(clk25MHz,intHcnt,intVcnt)beginifintHcnt=HoriginandintHcnt<=Horigin+Hs