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ID:40528195
大小:39.50 KB
页数:9页
时间:2019-08-04
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1、Eda设计报告南华大学版:--*******************************************************--------******Thiscomponentofthekeystable***************--------*****Function:scanthekeysandfilterthenosiy***-------------------------------------------------------------------------------20104470338electronicimformationengi
2、neer----------LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;USEIEEE.STD_LOGIC_UNSIGNED.ALL;ENTITYkeystableIS--theentityofkeystablePORT(clk1,keyin:INSTD_LOGIC;--clk11024Hzkeyout:OUTSTD_LOGIC);--theportofkeyoutENDENTITYkeystable;ARCHITECTUREbehvofkeystableisSIGNALKH,KL:STD_LOGIC_VECTOR(3downto0);BEGINP
3、ROCESS(clk1,keyin)BEGINifclk1'eventandclk1='1'thenifkeyin='0'thenKL<=KL+1;elseKL<="0000";--lowENDIF;ENDIF;ENDPROCESS;PROCESS(clk1,keyin)BEGINifclk1'eventandclk1='1'thenifkeyin='1'thenKH<=KH+1;elseKH<="0000";--highENDIF;ENDIF;ENDPROCESS;PROCESS(clk1,KH,KL)BEGINifclk1'eventandclk1='1'thenif(KH>"
4、0011")thenkeyout<='1';--putouthighelsif(KL>"0010")THENkeyout<='0';--putoutlowENDIF;ENDIF;ENDPROCESS;ENDARCHITECTURE;--*******************************************************--------******Thiscomponentofthecounter***************--------*****Function:contertheclk***************------------------
5、-------------------------------------------------------------20104470338electronicimformationengineer----------LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;USEIEEE.STD_LOGIC_UNSIGNED.ALL;USEIEEE.STD_LOGIC_ARITH.ALL;ENTITYcounterISGENERIC(n:INTEGER);PORT(clk,reset,direction,just,en:INSTD_LOGIC;COUT:O
6、UTSTD_LOGIC;daout:OUTSTD_LOGIC_VECTOR(3DOWNTO0));ENDENTITYcounter;ARCHITECTUREfunOFcounterISSIGNALC:STD_LOGIC;SIGNALQ,Q1,Q2,Q3:STD_LOGIC_VECTOR(3DOWNTO0);BEGINCOUT<=C;daout<=Q;PROCESS(clk,reset,en,Q,Q1,Q2)VARIABLEQTemp:STD_LOGIC_VECTOR(3DOWNTO0);BEGINIF(reset='0')THENQ1<="0000";C<='0';ELSIFEN=
7、'1'THENIF(clk'eventandclk='1')THENIF(Q1
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