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1、AdvancedTechniquesinLogicSynthesis,OptimizationsandApplicationsSunilP.Khatri·KanupriyaGulatiEditorsAdvancedTechniquesinLogicSynthesis,OptimizationsandApplications123EditorsSunilP.KhatriKanupriyaGulatiDepartmentofECEIntelCorporation333FWERC,MS32592501NW229thAveTexasA&MUniversityHillsboro,OR97124
2、,CollegeStation,TX77843-3259,USAUSAkanupriya.gulati@intel.comsunilkhatri@tamu.eduISBN978-1-4419-7517-1e-ISBN978-1-4419-7518-8DOI10.1007/978-1-4419-7518-8SpringerNewYorkDordrechtHeidelbergLondoncSpringerScience+BusinessMedia,LLC2011Allrightsreserved.Thisworkmaynotbetranslatedorcopiedinwholeorin
3、partwithoutthewrittenpermissionofthepublisher(SpringerScience+BusinessMedia,LLC,233SpringStreet,NewYork,NY10013,USA),exceptforbriefexcerptsinconnectionwithreviewsorscholarlyanalysis.Useinconnectionwithanyformofinformationstorageandretrieval,electronicadaptation,computersoftware,orbysimilarordis
4、similarmethodologynowknownorhereafterdevelopedisforbidden.Theuseinthispublicationoftradenames,trademarks,servicemarks,andsimilarterms,eveniftheyarenotidentifiedassuch,isnottobetakenasanexpressionofopinionastowhetherornottheyaresubjecttoproprietaryrights.Printedonacid-freepaperSpringerispartofSpr
5、ingerScience+BusinessMedia(www.springer.com)PrefaceThelastfewdecadeshaveseenastupendousgrowthinthespeedandcomplex-ityofVLSIintegratedcircuits.Thisgrowthhasbeenenabledbyapowerfulsetofelectronicdesignautomation(EDA)tools.TheearliestEDAtoolsweretwo-levellogicminimizationandPLAfoldingtools.Subseque
6、ntly,EDAtoolsweredevelopedtoaddressotheraspectsoftheVLSIdesignflow(inadditiontologicoptimization)suchastechnologymapping,layoutoptimization,formalverification.However,researchinlogicsynthesisandoptimizationcontinuedtoprogressrapidly.Someoftheresearchinlogicsynthesistoolssawbroaderapplication,toar
7、easfarremovedfromtraditionalEDA,androutinelycontinuetodoso.Whileobservingtherecentdevelopmentsandpublicationsinlogicsynthesisandoptimization,wefeltthattherewasaneedforasingleresourcewhichpresentssomerecentsignifi-cantdevelopmentsin
