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1、®APEXIITheCompleteI/OSolutionJuly2002AlteraintroducestheAPEX™IIdevicefamily:high-performance,high-bandwidthprogrammablelogicdevices(PLDs)targetedtowardsemergingnetworkcommunicationsapplicationsandprotocols.APEXIIdevicessupportprotocolssuchastheUTOPIAIV,R
2、apidIO™,CSIX,andPOS-PHYLevel4protocols,makingthemtheidealsolutionforcomplexsystems.TheAPEXIIdevicefamilyfeatures1-gigabitspersecond(Gbps)dedicatedTrue-LVDS™circuitry,phase-lockedloops(PLLs),embeddedsystemblocks(ESBs),content-addressablememory(CAM),andenh
3、ancedall-layer-copperinterconnects.AdvancedHigh-PerformanceLVDSn361-GbpsTrue-LVDSinputand361-GbpsTrue-LVDSoutputchannelsnUpto88624-megabitspersecond(Mbps)Flexible-LVDSTMinputchannelsand88624-MbpsFlexible-LVDSoutputchannelsnLVDS/LVPECL/PCML/HyperTransport
4、™I/OsupportSupportedI/OProtocolsEnhancedArchitecturenRapidIOn4KbitsofmemoryperESBnPOS-PHYL4nDual-port+RAMinESBswithbidirectionalread/writeportsnFlexbusnEightPLLoutputtapsnPCI-XnSixhigh-speedregisterspernUTOPIAIVI/OelementnCSIXnLCSnZero-busturnaround(ZBT)
5、,double-datarate(DDR),andquad-datarate(QDR)memoryinterfacesupportthatcandriveeightdifferentglobalclocknetsand/orTheCompleteI/OSolutioncircuitsignalsforcomprehensiveclockmanagementThehigh-densityAltera®APEXIIandsynthesisneeds.Onthefollowingpage,Table1devi
6、cefamilyoffersadvancedI/OdescribessomeofthehighlightsofAPEXIIdevices,featurestosupportatotalsystem-andTable2showsthewiderangeoffeaturesandon-a-programmable-chip(SOPC)packagesavailable.solution.APEXIIFPGAsarebasedona0.15-/0.13-µmall-layer-copperinterconne
7、ctI/OStandardSupportfortechnologytoaddresstheincreasingperformanceandHigh-BandwidthApplicationsbandwidthrequirementsofcommunicationapplications.APEXIIdeviceshavededicatedsupportforcutting-edgeThesedevicesofferversatilityandflexibilityforhigh-I/Ostandards
8、suchastheHSTL,SSTL,LVPECL,PCML,performanceSOPCapplications.HyperTransport,CTT,GTL+,PCI-X,AGP,LVTTL,LVCMOS,TheAPEXIIdevicedensitiesrangefrom16,640logicandLVDSstandards—withperformanceupto1Gbps.elements(LEs)to67,200LEs.Based
