半导体封装制程及其设备介绍

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1、半导体封装制程与设备材料知识简介PrepareBy：WilliamGuo2007.11Update半导体封装制程概述半导体前段晶圆wafer制程半导体后段封装测试封装前段（B/G-MOLD）－封装后段（MARK-PLANT）－测试封装就是將前製程加工完成後所提供晶圓中之每一顆IC晶粒獨立分離，並外接信號線至導線架上分离而予以包覆包装测试直至IC成品。半导体制程Oxidization(氧化处理)Lithography(微影)Etching(蚀刻)DiffusionIonImplantation(扩散离子植入)Deposition(沉积)WaferInspec

2、tion(晶圆检查)Grind&Dicing(晶圓研磨及切割)DieAttach(上片)WireBonding(焊线)Molding(塑封)Package(包装)WaferCutting(晶圆切断)WaferReduce(晶圆减薄)LaserCut&packagesaw(切割成型)Testing(测试)Lasermark(激光印字)IC制造开始前段結束后段封装开始製造完成封裝型式(PACKAGE)ThroughHoleMountShapeMaterialLeadPitchNoofI/OTypicalFeaturesCeramicPlastic2.54mm(1

3、00miles)8~64DIPDualIn-linePackagePlastic2.54mm(100miles)1directionlead3~25SIPSingleIn-linePackage封裝型式ThroughHoleMountShapeMaterialLeadPitchNoofI/OTypicalFeaturesPlastic2.54mm(100miles)1directionlead16~24ZIPZigzagIn-linePackagePlastic1.778mm(70miles)20~64S-DIPShrinkDualIn-linePackag

4、e封裝型式ThroughHoleMountShapeMaterialLeadPitchNoofI/OTypicalFeaturesCeramicPlastic2.54mm(100miles)half-sizepitchinthewidthdirection24~32SK-DIPSkinnyDualIn-linePackageCeramicPlastic2.54mm(100miles)PBGAPinGridArray封裝型式SurfaceMountShapeMaterialLeadPitchNoofI/OTypicalFeaturesPlastic1.27mm

5、(50miles)2directionlead8~40SOPSmallOutlinePackagePlastic1.0,0.8,0.65mm4directionlead88~200QFPQuad-FlatPack封裝型式SurfaceMountShapeMaterialLeadPitchNoofI/OTypicalFeaturesCeramic1.27,0.762mm(50,30miles)2,4directionlead20~80FPGFlatPackageofGlassCeramic1.27,1.016,0.762mm(50,40,30miles)20~

6、40LCCLeadlessChipCarrier封裝型式SurfaceMountShapeMaterialLeadPitchNoofI/OTypicalFeaturesCeramic1.27mm(50miles)j-shapebend4directionlead18~124PLCCPlasticLeadedChipCarrierCeramic0.5mm32~200VSQFVerySmallQuadFlatpackAssemblyMainProcessDieCure(Optional)DieBondDieSawPlasmaCardAsyMemoryTestCl

7、eanerCardTestPackingforOutgoingDetaping(Optional)Grinding(Optional)Taping(Optional)WaferMountUVCure(Optional)LasermarkPostMoldCureMoldingLaserCutPackageSawWireBondSMT(Optional)半导体设备供应商介绍-前道部分PROCESSVENDORMODELSMT-PRINTERDEKHOR-2ISMT–CHIPMOUNTSIMENSHS-60TAPINGNITTODR3000-IIIINLINEGR

8、INDER&POLISHACCRETECHPG300