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1、题目:写出带异步复位边沿(下降沿)JK触发器的VHDL程序:LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;ENTITYjk1isPORT(clk,R,S:INSTD_LOGIC;j,k:INSTD_LOGIC;q,qn:OUTSTD_LOGIC);ENDjk1;ARCHITECTUREoneOFjk1ISSIGNALq_s:STD_LOGIC;BEGINPROCESS(R,S,clk,j,k)BEGINIF(R='1'ANDS='0')THENq_s<='0';ELSIF(R='0'ANDS='1')THE
2、Nq_s<='1';ELSIFclk'EVENTANDclk='0'THENIF(J='0'ANDk='0')THENq_s<=q_s;ELSIF(J='0'ANDk='1')THENq_s<='0';ELSIF(J='1'ANDk='0')THENq_s<='1';ELSIF(J='1'ANDk='1')THENq_s<=NOTq_s;ENDIF;ENDIF;ENDPROCESS;q<=q_s;qn<=notq_s;ENDone;基本RS触发器entityrsffisport(r,s:instd_logic;q,qb:outstd_lo
3、gic);endrsff;architecturertlofrsffissignalq_temp,qb_temp:std_logic;beginprocess(r,s)beginif(s='1'andr='0')thenq_temp<='1';qb_temp<='0';elsif(s='0'andr='1')thenq_temp<='0';qb_temp<='1';elseq_temp<=q_temp;qb_temp<=qb_temp;endif;endprocess;q<=q_temp;qb<=qb_temp;endrtl;.同步RS触
4、发器libraryieee;useieee.std_logic_1164.all;entitysynrsffisport(clk,r,s:instd_logic;q,qb:outstd_logic);endsynrsff;architecturertlofsynrsffissignalq_temp,qb_temp:std_logic;beginprocess(clk,r,s)beginif(clk='1')thenif(s='1'andr='0')thenq_temp<='1';qb_temp<='0';elsif(s='0'andr='
5、1')thenq_temp<='0';qb_temp<='1';elseq_temp<=q_temp;qb_temp<=qb_temp;endif;elseq_temp<=q_temp;qb_temp<=qb_temp;endif;endprocess;q<=q_temp;qb<=qb_temp;endrtl;.同步D触发器libraryieee;useieee.std_logic_1164.all;entitysyndisport(clk,d:instd_logic;q,qb:outstd_logic);endsynd;architec
6、turertlofsyndissignalq_temp,qb_temp:std_logic;beginprocess(clk)beginif(clk='1')thenq_temp<=d;qb_temp<=notd;elseq_temp<=q_temp;qb_temp<=qb_temp;endif;endprocess;q<=q_temp;qb<=qb_temp;endrtl;带异步置位复位边沿(上升沿)D触发器libraryieee;useieee.std_logic_1164.all;entityadffisport(clk,d,r,s
7、:instd_logic;q,qb:outstd_logic);endadff;architecturertlofadffissignalq_temp,qb_temp:std_logic;beginprocess(clk,r,s)beginif(r='0'ands='1')thenq_temp<='1';qb_temp<='0';elsif(r='1'ands='0')thenq_temp<='0';qb_temp<='1';elsif(clk'eventandclk='1')thenq_temp<=d;qb_temp<=notd;end
8、if;endprocess;q<=q_temp;qb<=qb_temp;endrtl;